

So, the binary information “011” is obtained in parallel at the outputs of D flip-flops before applying positive edge of clock. Let us see the working of 3-bit SISO shift register by sending the binary information “011” from LSB to MSB serially at the input.Īssume, initial status of the D flip-flops from leftmost to rightmost is $Q_=011$.
#Basic data movement in shift registers serial#
Hence, this output is also called as serial output.

So, we can receive the bits serially from the output of right most D flip-flop. For every positive edge triggering of clock signal, the data shifts from one stage to the next. Hence, this input is also called as serial input. In this shift register, we can send the bits serially from the input of left most D flip-flop. All these flip-flops are synchronous with each other since, the same clock signal is applied to each one. That means, output of one D flip-flop is connected as the input of next D flip-flop. This block diagram consists of three D flip-flops, which are cascaded. The block diagram of 3-bit SISO shift register is shown in the following figure. The shift register, which allows serial input and produces serial output is known as Serial In – Serial Out (SISO) shift register. Serial In − Serial Out (SISO) Shift Register
